VECTRONIC Aerospace has developed the VPDHS Payload Data Handling System especially for small satellite applications.
The VPDHS has the tasks to receive incoming payload data like camera data to store, compress and format the payload data for transmitting it via High Speed Interface to the ground station.
The VPDHS is based on a FPGA/Microcontroller-Architecture and provides storage capacity of 4 GBytes SDRAM and 16 GBytes non-volatile Flash memory.
The Microcontroller acts as the System Monitor and main communication interface to the On-Board computer. The System Monitor supervises the proper operation of the FPGA, supervises the internal temperatures and internal current consumption. Furthermore the Microcontroller ensures the integrity of the content of the in circuit programmable Flash memory.
The device has the following main tasks:
- Reception of high speed data of two cameras via LVDS interfaces (e.g. Camera Link)
- Storage of camera data inside the internal SDRAM memory
- Optional storage of data inside the internal non-volatile flash memory
- Interface (RS422) to the On-Board Attitude Control computer (reception, storage and transmission of ACS data for ground station ACS post processing)
- Multiple LVDS Interfaces to On-Board devices
- Interface (RS422) to the GPS Receiver (Pulse-per-second synchronization)
- Real-Time compression of imager data (adjustable lossy and lossless compression)
- CCSDS formatting of transmitted data
- High Speed Interface to the On-Board transmitter
- SEU-Protection of the FPGA bit configuration with a SEU-Controller controlled by the System Monitor
|290 mm x 192 mm x 34 mm
|6 x M4
|Max 15 W
|9V – 18V, 18V – 36V
|RS422 / RS485
|-20°C to + 70°C
|Storage temp. range
|-40°C to + 80°C
|13.4 g rms
|> 20 krad
|Storage Capacity SDRAM
|Storage Capacity Flash
|16 GBytes non-volatile
30 LVDS I/O @ 480 Mbps
24 SerDes inputs @ up to 2 Gbps
1 LVDS output @ 105 Mbps